Sunday, January 16, 2011

From a fresh grad to VLSI Design engineer – Meet Mr. Kaleem, Sasken

 

They say the best appreciation one can get is through one’s customers’ voice – we at CVC (www.cvcblr.com) take every individual trainee as serious as our corporate customers. That has been our reason behind success on both Corporate & individual levels. Here is yet another success story, this time from Md. Kaleem, ASIC Design-Verification Engineer @ Sasken. Kaleem got trained by TeamCVC and also was consulting for us for 2 projects after the training, through which he gained real practical knowledge that has helped him sail through the tough job climate. Kaleem went through our EIC (http://www.cvcblr.com/trng_profiles/CVC_EIC_profile.pdf) and then worked on OVM http://www.cvcblr.com/trng_profiles/CVC_DR_OVM_profile.pdf projects before moving on to even better job prospects.

Here is what he wrote to us over this weekend! Good luck Kaleem and keep in touch!

Mohammed Kaleemulla (http://in.linkedin.com/pub/mohammed-kaleemulla/23/186/b98)

Sent: Sunday, January 16, 2011 12:23 PM

Hi,

Sir This is Kaleem here,i have got a job in Sasken for the post of design verification engineer,I thank CVC for giving me all the support required for developing  the technical and knowledge-able skills, without which I wouldn't have  reached here and I hope we will have a reciprocate communication.


Regards
Kaleem

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