Sunday, January 16, 2011

SystemVerilog constraints – distribution & using FCOV to visualize the effect

– Satish U, ASIC Design & Verification engineer @ CVC (www.cvcblr.com)

SatishU_CVC Every day at work is learning something new. More so when you are asked to work deep into advanced technologies such as SystemVerilog. In a recent project I was asked to delve deep into the constraints portion of SystemVerilog and solve few customer problems in modeling real life traffic pattern generation using SystemVerilog constraints. As part of it, I came up with an interesting to way to visualize the distribution through SystemVerilog covergroup/coverpoint. Though it is little round-about and may not be the best way to “verify” distribution, the technical lead at CVC quickly grasped the value and encouraged to explore more and develop a blog on the same. It is this “cultivating ideas” that makes working at CVC (www.cvcblr.com) a perfect blend of learning & fun (and don’t miss it – very aggressive timelines too).

 

                  A New way to check the distribution

  By definition the distribution within randc must be uniform. Let’s formulate this statement and validate the same. To find the distribution of lets say randc within a particular range N (N is the number of values in the range). Now let us assume M is the number of times an object is randomized.

Each value has a probability of 1/N.
 

  • Case1: IF M = 1*N - If M= N then the values should be unique without any repetition.
  • Case2: If M = 2*N - each value should be generated 2 times.
  • Case3: M = K*N. Hence the number of times each value shall be generated is equal to K.

The N & M determine the “stimulus” side of verification. How do you “check” the distribution? An automated & robust method would be to use a queue and check the contents of the queue to see if they are unique, Infact one of our interns (Suhas: http://in.linkedin.com/pub/suhas-reddy/15/b02/49) is doing this as a mini-project at CVC (www.cvcblr.com) as part of our popular BUDS internship (http://www.cvcblr.com/downloads/BUDs_CVC_Acad.pdf).

However I proposed another interesting way to do this: Declare X as a cover point within a covergroup , so by default we will have N bins created for the N number of values (else one could use the auto_bin_max if care to). Other choice would be to use an array bin as shown below.

To demonstrate with an example:

`define N 4

`define K 1
`define M `K ** `N

`define seed_value 100

package pkg;
class xactn;
  randc bit [(`N-1):0] a;

  covergroup cg;
   A_cp      : coverpoint  a { bins a[] =  {[0:15]};}
  endgroup:cg
   function void post_randomize;
     cg.sample();
   endfunction

lets assume a 4 bit vector a, So we can have 16 possible values (N = 16).

We used Aldec’s (www.aldec.com) Riviera-Pro:       Rvra-Pro

Here is how Riviera visualizes it in its coverage report.

Riviera
 

  • Case1: for M = N if all the bins are hit once it means that i have uniform distribution.
  • Case2: M = 2 * N - each bin should be hit 2 times.
  • Case3: Now lets take the constant 2 as K. the equation becomes M = K*N. Hence the number of times each bin is hit will
       be equal to K.

We used this method to analyze various constraints and distributions. More about it in part-2 of this blog. Stay tuned to VoW blog

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