December is usually the time of holidays, relatively work load etc. Given the challenging job scenario this is also the best time to hone your skills and face the New Year with new skills, explore new job avenues, segments etc.
CVC is launching its highly successful 2 weeks certificate course on Functional Verification using SystemVerilog with a project in one of the following domains.
· Networking
· Communication
· Image Processing
VFest also focuses the language aspect SV in depth. Broadly it covers the following topics:
- SystemVerilog basics (SVB) http://www.cvcblr.com/trng_profiles/CVC_LG_SVD_profile.pdf
- Verification Using SystemVerilog (VSV) http://www.cvcblr.com/trng_profiles/CVC_LG_VSV_profile.pdf
- Verification Methodology (VM)
Duration
| Topic | Duration |
| SystemVerilog Basics | 0.5 day |
| Verification using SystemVerilog | 2.5 days |
| Mini Project | 2.0 days |
| Verification Methodology | 2.0 days |
| Project | 3.0 days |
Schedule
Tentative: 1st week of December, 2009
For exact schedule visit http://www.cvcblr.com/blog/ or contact us.
Contact
Send an email to: training@cvcblr.com and/or cvc.training@gmail.com for more details, cost etc. Or call us at: +91-9620209226/+91-80-42134156
Please include the following details in your email:
Name:
Company Name:
Contact Email ID:
Contact Number:
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